User manual Sony VAIO PCG-GRV550

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CHAPTER 1.  
BLOCK DIAGRAM  
2
00MHz Memory Bus  
DDR)  
Pentium4  
Processor  
Memory  
CONTROLLER  
HUB (MCH) 845MZ  
593 FCBGA  
(
CPU Local Bus  
CLKGEN  
IMI  
512KB L2  
16.0inch SXGA  
SMBUS2  
SMBUS2  
4
78pins  
9870GTD  
DDR(SO-DIMM)  
SONY  
uFCPGA  
Refer to Clock Generator  
BlockDiagram  
TV-Out  
LCD CONN  
AV  
Out  
Cable  
USB Right  
CONN  
Port-0  
Audio-Out  
UAX: DDR200 256MB x  
EAX: DDR200 256MB x  
2
1
USB Left  
CONN  
Port-3  
Port-3  
USB3  
USB2  
VGA DSUB-15  
Graphics  
M7-32CL  
USB Rear  
CONN  
Port-2  
Port-2  
TV-Out  
i.LINK  
(AT)I  
i.LINK0  
TV-Out  
Port-1  
Reserved  
Dock-VGA DB-51  
S-Video-Out  
Port-5  
Reserved  
PCI BUS(3.3)V  
ForSPD  
ForSPD  
EEPROM  
EEPROM  
OnDIMM1  
OnDIMM2  
Port0-5  
IO Control Hub  
ICH3-m  
SMBUS2  
Ether  
PHY  
CardBus/16bitCard  
Difference from GRX:  
. CPU PowerCircuit (with  
PowerLimitter)  
2. Gfx M7CL32  
PC Card  
Connector  
2 Slot  
FW82801CAM  
1
CARDBUS  
i.LINK  
EEPROM  
ForLAN  
IDE(ATA100)  
&
RICOH  
R5C552  
Bus #2 Dev #5  
RJ-45  
EEPROM  
ForVID  
EEPROM  
EEPROM  
Fori.LINK  
EEPROM  
ForPassword ForClockGEN  
3
4
5
. Chipset 845MZ  
. Remove MS/JOG/PortRi  
. LCD 16.0 SXG  
Internal  
HDD  
i.LINK0  
LPC  
RJ45  
RJ-45  
RJ-11  
AC LINK  
RJ11  
SM BUS1  
FWH  
Multi Purpose Bay  
Optical  
Drive  
Super I/O  
8
Mb  
H8S/2149  
SMsC  
LPC47N227  
SMBUS0  
Audio  
(Flash BIOS  
ROM)  
KBC/EC  
SPIC  
2
nd  
YMF753  
(Yamaha)  
Battery  
(
Combo)  
MDC  
FAN0  
ATF0  
FAN1  
(
Mobile  
LID  
Daughter  
Card)  
ATF1  
DCin  
BATTERY2  
Modem  
Parallele  
I/O Expander  
& SM BUS MUX  
Other  
Power  
Circuit  
w/Power  
Limiter  
DC Jack  
Control  
1
st  
Battery  
AMP, etc.  
RJ-11  
BATTERY1  
BATTERY2  
BATTERY1  
TouchPad  
LINE-OUT PHONE  
OUT  
MIC  
IN  
Speaker  
L&R  
Internal KeyBoard  
Membrane  
Parallele  
Parallele  
Confidential  
1
-1  
1-2  
END)  
PCG-GRV550 (AM)  
(

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