User manual Fujitsu MB15E07SL

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MB15E07SL  
BLOCK DIAGRAM  
(
16)  
fr  
(15)  
16 φR  
OSCIN  
1
Reference  
oscillator  
circuit  
Phase  
comparator  
(
1)  
(14)  
15 φP  
OSCOUT  
2
Lock  
SW FC LDS CS  
4-bit latch  
detector  
Binary 14-bit  
reference counter  
(
13)  
14 LD/fout  
(2)  
3
LD/fr/fp  
selector  
14-bit latch  
V
P
fp  
.
.
C
N
T
19-bit shift register  
(12)  
13 ZC  
(
3)  
V
CC  
4
.
. .  
. . .  
7
-bit latch  
11-bit latch  
(
11)  
(
4)  
Intermittent  
mode control  
(power save)  
1
2
PS  
DO  
5
Binary 11-bit  
programmable  
counter  
Binary 7-bit  
swallow counter  
(
10)  
(
(
(
5)  
11 LE  
GND  
6
1
control  
latch  
-bit  
(9)  
1
0 Data  
6)  
7
Xfin  
fin  
MD  
Prescaler  
32/33  
4/65  
6
7)  
8
(8)  
9
Clock  
:
SSOP  
(
) : BCC  
4

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